Pm/am multiplex communication



Oct. 15, 1968 s. J. MEHLMAN PM/AM MULTIPLEX COMMUNICATION 4 Sheets-Sheet1 Filed July 1, 1965 INVENTOR. .f4/vwl .XMIM/w BY mwm CM2;

ifm/wey Oct. l5, 1968 s, J. MEHLMAN 3,406,343

PM/AM MULTIPLEX COMMUNICATION Filed July l, 1965 4 Sheets-Shawl` 2 gt /v@wfm Oct. 15, i968 s. J. MEHLMAN PM/AM MULTIPLEX COMMUNICATION 4Sheets-Sheet 3 Filed July l, 1965 Oct. 15, 1968 s. J. MEHLMAN 3,406,343

PM/AM MULT I PLEX COMMUNICAT ION Filed July l, 1965 4 Sheets-Sheet 4 Q@C?) @INVENTOR fw/wan .f M14/4M ino/wey United States Patent() ABSTRACT FTHE DISCLOSURE A cycle of a given wave is phasedmodulated to indicate amark pulse by reversing the phase ofthe given Wave at the middle of thecycle lthereof, and to indicate a space by making no change in the-cycleof the given Wave. A cycle of the given wave is also amplitude modulatedby changinlg the amplitude of the cycle to .indicate a mark pulse and bynot changing the amplitude of the cycle to indicate a space. To keep theaverage amplitude of the doubly modulated Iwave at zero, the Wave cyclesthat are phased modulated and the wave cycles that are amplitudemodulated differ by lan odd number of half cycles of the given wave.

`This invention relates to multiplex, pulse modulation communicationsystems, and, more particularly, to an improved communication systemwherein each cycle of a carrier wave is both phase and amplitudemodulated, and to a system for demodulating the so-modulated wave.

The usefulness of a signal channel can be increased by increasing theamount of information per given time interval sent over the channel. Ifthe frequency band width of a channel over which increased amounts ofinformation are to be sent is limited, the amount of information thatcan be transmitted over the ohannel must be increased Without producinga substantial amount of signal energy `at frequencies outside thefrequency band of the channel. Otherwise, the received signal havinglost signal energy at the frequencies outside the band, will not be anaccurate reproduction of the signal applied to the channel. It has beendiscovered that the amount of information that can be transmitted pertime interval over a transmission channel can be increased, withoutincreasing the required band width, by pulse modulation techniques,including both pulse `amplitude and pulse phase modulation. By using theamplitude` of transmitted pulses to `indicate both amplitude and phasemodulation, the amount of information carried by a channel can beincreased and still provide acceptable reproduction of the originalsignals.

It is an object of this invention to provide an improved system ofcommunication for increasing the amount of information that can betransmitted over a given communication channel.

It is a further object of this invention to provide an improved combinedpulse amplitude and pulse phase modulator.

It is a still further object of this invention to provide an improveddemodulator of a wave which is pulse-modulated both in phase andamplitude.

Another object of this invention is to provide a system of communicationincluding a transmitter for both pulse amplitude and 4pulse phasemodulating each cycle of a wave and a receiver for demodulating thetransmitted wave.

In accordance with one embodiment of `this invention, means are providedfor producing a communication signal including a lplurality of equallyspaced bauds or 'signal intervals of equal time duration. A pulseoccurring during a baud comprises a mark, and lack of a pulse during abaud comprises a space. The 4bauds are alternately applied to two paths.A square wave is applied out 3,406,343 Pfeatedoct. 15, 196s of phase tothe two paths, the periodof the square wave -being equal to twicethelength of a baud. The phase' of the square wave applied to one path isreversed each time a baud including a mark is applied to that path, butno phase change occurs when a` baud including a space is applied to thatone path, whereby a phase modulated square wave is produced. Theamplitude of the ph'ase modulated square wave is changed when a 'baudthe phase modulated square wave is changed when a ba'ud including aVmark is applied to the other path, but the amplitude of the phasemodulated square wave is not changed when a baud including a 'space isapplied to the other path. The vamplitude modulation may be applied tothe square wave after a delayof an odd number of l/a cycles thereof, toassist in providing aezero average direct current level of the resultingphase andwarnplitude modulated wave. The marks and spaces can originallybe produced by sampling an analogue wave. A mark is produced when theanalogue wave exceeds a predetermined amplitude during a baud, and noresponse and therefore a space is produced when the analogue Wave doesnot exceed the said predetermined amplitude during another baud.

If desired, the doubly modulated wave can be' sent through a low-phasefilter to take off the sharp corners of the square wave before applyingthe wave to an existent transmission channel, or the channel itself mayremove the high frequency represented by the corners of the square Wave.

The phase and amplitude modulated wave is demodulated aftertransmission. Since the amplitude of only two points in each cycle ofthe transmitted wave indicates both phase and amplitude modulation, thephase and amplitude modulated waves do not require a substantiallygreater band width for transmission than a Wave that is either pulseamplitude modulated or pulse phase modulated, whereby according to thesystem of this invention, twice a's much information can be sent over anexistent channel than can be sent over vthis channel by prior artsystems.

The novel features of this invention, both as to its organization andmethod of operation as Well as additional objects and advantagesthereof, will be understood more readily from the following description,whenI read in conjunction with the accompanying drawings in which:

FIG. 1 is a block diagram of one embodiment of a transmitter ormodulator of this invention;

FIG. 2 is a series of wave forms useful -in describing the operation ofthe embodiment shown in FIG. 1;

FIG. 3 is a block diagram of one embodiment of a receiver or demodulatorof this invention; and

FIG. 4 is a series of Wave forms useful in describing the operation ofthe embodiment shown in FIG. 3.

A suitable transmitter for generating an AM-PM signal in accordance withthe invention is shown in FIG. 1, and the Wave forms developed thereinin a typical operation of the transmitter are shown in FIG. 2. Two typesof ilip-flop circuits are used in the transmitter of FIG. 1. The rsttype illustrated as rectangles 15 and 36 reverses the phase of theoutput signals appearing at its output connections 1 and 0 each time apulse `of the proper polarity is applied to its input (or inputs) T, thewaves at the outputs 1 and 0 being of opposite phase at all tim'es.

The second type of Hip-flop circuit, illustrated as the rectangles 24,30 and 32, provides a respective corresponding phase of outputresponsive to the application of a V pulse of a proper polarity to itsset or reset input terminals S and R. That is, upon application of apulse of a proper polarity to its S (or R) input terminal, its 1 and 0output terminal will exhibit a corresponding opposite phase relationwhich may be called the set (or reset) relation. Upon application of asecond pulse of proper polarity to the same input terminal, the phase ofthe output terminal will not change from its set (or reset relation).Upon applying a pulse ofthe proper polarity to its other terminal R (orS), the output of the flip-flop will exhibit its set (or reset)relation. Both types of ip-op circuits are similar in that they l.areinsensitive to pulses of improper polarity applied to their variousinput terminals.

Each And gate 16, 18, 27, 28 and 34 in the transmitter of FIG. 1provides an output at a given signal level at its output terminal onlywhen pulses of the proper polarity rare applied simultaneously to bothof the input terminals of the And gate. If less than both the inputterminals of an And gate have pulses of the proper polarity appliedthereto, the output of that And gate remains at some level other thanthe given signal level.

A source 13 of information is provided in FIG. l. This information maybe in analogue wave form, and it may be sampled at intervals inaccordance with` square waves A and B (see FIG. 2) produced by a squarewave generator 14. The square waves A and B, which are 180 out-of-phase,are applied to the data source: 13 to provide digital information E atthe output thereof. The square waves are timed so that there is one baudin curve E of FIG. 2 for each square wave A or B. The bauds of curve Einclude negative going pulses or marks indicated by Ms and absences ofpulses or spaces indicated by Slt at the end of each cycle of the wave Aor B. The wave A from the generator 14 is also applied to a flip-flopcircuit or flip-flop 15 of the first type mentioned above, whereby theflip-op 15 provides two 180 out-of-phase waves C and D synchronized withthe wave A and of 1/2 the frequency thereof. The wave C appears at theoutput terminal of the flip-flop 15 marked 1, and the wave D appears atthe output terminal thereof marked 0. All the digital information Eappearing at the output of the source 13 is applied to one input of bothof the two And gates 16 and 18. The wave C is applied to the other inputof the And gate 16, while the wave D is applied to the other input ofthe other And gate 18. Since alternate negativegoing voltages areapplied to these And gates 16 and 18, the bauds of information Eappearing at the output of the source 13 are applied alternately toinverters '20 and 22. Information appearing at the output of the Andgate 16 will be considered rst.

When the wave C is negative-going, information contained in the evennumbered bauds of curve or line E appear at the output of the And gate16 and in inverted form at the output of inverter 20. The informationfor the even bauds is represented by curve K of FIG. 2 which indicatesthe information MSSMMS. This information is applied to the reset inputterminal of a flip-flop 24. The wave C from the flip-flop 15 is alsoapplied to a differentiator 26 to provide pulses, curve G. These pulsesare applied to the set terminal S of the flip-op 24 to cause it toprovide the output voltage curve L at its 1 output terminal and theoutput voltage curve M" at its 0 output terminal. As explained above, ifthe iiip-op 24 were producing positive-going Voltage at its 1 outputterminal and negative-going voltage at its 0 output terminal,application of a curve G pulse thereto from the differentiator 26 wouldhave no effect on the ip-op 24; that is, the flip-flop 24 would continueto produce positive-going voltage at its 1 output terminal andnegative-going voltage at its 0 output terminal. However, application ofa curve K pulse from the inverter 20 to the reset terminal R of theflip-flop 24 causes a reversal in output; that is, it causesnegative-going voltage curve L to appear at its 1 output terminal andpositive-going voltage curve M to appear at the 0 output terminal. Dueto described connection, a curve G pulse is always applied from thedifferentiator 26 to the flip-flop 24 just before a curve K pulse (ifthere be one) is applied thereto from the inverter 20, whereby a curve Kpulse when it appears always reverses the polarities of the outputs offlip-flop 24. In the absence of a curve K pulse, the outputs, curves Land M', of the ip-ilop 24 are positive-going at the 1 output terminaland negative-going at the 0 output terminal.

The signal condition, curve L appearing at the output terminal 1 of thedip-flop 24 .is applied with the pulses of curve G to the respectiveinputs of an And gate 27. Positive-going pulses, curve N, appear at theoutput of the And gate `27' when a pulse of curve G lis applied from thedifferentiator 26 to the And gate 27 while the voltage, curve L at theinput to the And `gate 27 from the ip-ilop 24 is positive-going. n

The signal condition, curve M', appearing at the 0 output terminal oftheflip-11019.24 is applied, with the` pulses of curve G produced at theoutput of the diterentiator 26, to the respective inputs of an And gate28. Positive-going pulses shown in curve O' appear at the output of theAnd gate 28 when the pulses of curve G are applied from thediterentiator 26 tothe And gate 28 while the signal condition M' at theoutput of the flip-flop 24 `is positivegoing. Pulses as shown in curvesN and O are applied from the And gates 27, 28 to the set S and tothe'reset R inputs, respectively, of a flip-Hop circuit 30. Each pulseof curve O resets the output of the flip-flop circuit 30 so that itsoutput shown in curve P is positive-going, and flip-flop 30 produces apositive-going voltage as long as it is in its reset condition; that isuntil a pulse of curve N is applied from And gate 2 to the set input Sof flip-flop 30 at which time the output of the flip-flop 30 becomesnegative going. Application of the pulses of curve O' from And gate 28to the p-op 30 while the output of pflop 30, curve P is positive-goinghas no effect on this output` Similarly, application of a pulse of curveN from the And gate 27 to the flip-flop 30 while the output of flip-flop30 is negative-going has no eiect on this output. The wave, curve P,appearing at the output of ip-ilop 30 is positive-going for evennumbered bauds of curve E that represent a mark and is negative-goingfor even numbered bauds of line E that represent a space. However, thebauds as shown in curve P are twice as long at the bauds shown in curveE and also the bauds of curve P are delayed with respect to curve E byone baud of curve E or by l/2 a baud of curve P. The output, curve P, offlip-Hop 30 is applied to a modulator 40, which is described furtherbelow. As will be explained, the wave shown in curve P controls theamplitude of the output of modulator 40.

As noted above, the rst and every odd baud of line E is applied toip-ilop 32 by way of the And gate 18 and the inverter 22. Whenever anodd numbered baud of curve E indicates a mark, a pulse (see curve F ofFIG. 2) is applied to the reset input terminal of the flip-flop 32.Whenever an odd numbered baud of curve E represents a space, no pulse isapplied to the reset input terminal of flip-Hop 32. The pulses appliedto the reset input terminal of ip-op 32 are shown at curve F whichrepresents the information MSMMSS. The pulses of curve G are appliedfrom the differentiator 26 to the set input terminal S of the ip-op 32;that is, flip-flop 32 provides a positivegoing output after each pulseof curve G is applied thereto and until a pulse of curve F is appliedthereto, at which time the output of flip-flop 32 becomes negative-goingand remains negative-going until the next pulse of curve G is applied tothe ip-op 32, as shown by curve H. Due to the phase relationship of thepulses of curves F and G, the output voltage of the flip-Hop 32 isalways positivegoing whenever a pulse of curve F appears. The voltage atthe output of the flip-flop 32shown in curve H is applied to the Andgate 34 along with the pulses of curve G from the diierentiator 26. Theoutput pulses of the And gate 34 are applied to an input of the ip-op 36of the first type mentioned above through an' inverter 38 as shown incurve I. The output square wave shown in curve D of the flip-flop 15 isalso applied to an input of the iiip'- op 36. Either the negative-goinglportions of the wave D or the negative-going pulses I cause theflip-Hop 36 to reverse the polarity of its output, Whatever itspolarization may have been at the time that these negative-going signalconditions or pulses are applied to the flip-flop 36. Therefore, theoutput wave I of flip-flop 36 is a rectangular wave having a cyclelength that is twice as long as the bauds of curve E and in which thephase is shifted at the middle of each cycle of curve I for each oddnumbered mark of line E. As noted above, line J indicates theinformation MSMMSS. This wave lis also applied to the amplitudemodulator 40, and as will be explained, controls the polarity of theoutput thereof.

In the amplitude modulator 40, the wave of curve I is modulated by thewave of curve P, the wave shown in curve Q appearing at the output ofthe modulator 40. The lower level of curve P may be considered to be a+1 and the upper level of curve P may be considered to be a +2.Similarly the top level of curve I may be considered to be a +1 and thelower level of curve J may be considered to be a 1. The P and J wavesare so combined to produce the wave Q that the first PM informationappears at the left hand portion thereof marked PM and the first AMinformation appears a baud and a half later at the left hand lportionthereof marked AM. Bearing this phase relation in mind and also that thecurve I controls the polarity of the curve Q and that the curve Pcontrols the amplitude of the curve Q, that is, that the curves J and Pare combined in the modulator 40, the curve Q results. It is noted thatcurve Q represents a signal MSMMSS corresponding to the odd bauds ofcurve E applied to a carrier wave in phase modulation and to a signalMSSMM corresponding to the even bauds of curve E (the final S beingbeyond the illustrated end of the curve Q), applied to a wave inamplitude modulation, delayed however by a baud and 1/2 of the wave Q.

It will also be noted that, due to this delay of an odd number of halfbauds, all amplitude modulation is applied equally and in oppositedirections to the last half of a phase modulated baud and to the firsthalf of the next phase modulated baud. Therefore, the amplitudemodulation applied to the phase modulated wave does not vary the averageor displace the zero line of the wave carrying combined AM-PMmodulation. This is due to the fact that the last half of a PM modulatedwave baud interval and of the first half of the next PM modulated wavebaud interval are always out-ofphase. This wave Q can be applieddirectly to a transmission channel having a band width which willeliminate the high frequencies therefrom whereby a wave such as wave 1of FIG. 4 arrives at the receiver of FIG. 3.

The wave 1 of FIG. 4 is applied to an amplifier and clipper 42comprising a part of the receiver of FIG. 3. The amplifier and clipper42 has two out-of-phase outputs 2 and 3. These outputs are ofsubstantially constant amplitude; that is, the amplitude modulation ofthe applied wave is removed and waves 2 and 3 represent only the phasemodulation. These two waves 2 and 3, from the amplifier and clipper 42are applied to the two inputs of a timing extractor 44. The timingextractor 44 provides equally spaced pulses shown in curves 5 and 4 ofFIG. 4 from its outputs marked O and 180, respectively. The pulsesincluded in curves 4 and 5 are each spaced by a cycle of Waves C or D ofFIG. 2, and they are 180 outof-phase with respect to each other. Thewave 4 from the timing extractor 44 and the wave 2 -from the amplifierand clipper 42, as well as the w-ave from the 1 output terminal of aflip-flop 46, which is of the first type mentioned above, are applied tothe input terminals of an And gate 48. The wave 4 from the timingextractor 44 and the wave 3 from the amplifier and clipper 42 as well asa wave from the 0 output terminal of the flip-flop 46 (which is 180out-ofphase with the wave applied thereby to the And gate 48) areapplied to an And gate 50. The outputs of the And gates 48 and 50 areapplied to an Or gate 52. The output wave 6 of the Or circuit 52 isapplied through a delay circuit 54 to the input of the flip-fiop 46.There is an output fromthe And gate 48 only when thewave 2), the wave 4and the wave from flip-flop 46'applied thereto are simultaneouslynegative-going. Similarly there is an output from the And gate 50 onlywhen the wave 3 and lthe wave 4 and the wave applied thereto fromi-p-flop 46 are simultaneously negative-going. There is an output fromthe Or gate 52 whenever there is any input thereto. The delay providedby the del-ay circuit 54 is greater than the width of the pulses ofcurve 4 of FIG. 4 and shorter than the time between the lpulses ofcurves 4 and S. The delay circuit 54 actsy to prevent the liip-op 46from changing its state too fast and thereby making theoutput curve 6 ofOr gate 52 too narrow. The pulses of curve 6 appearing at the output ofthe Or gate 52 are also applied to one of the inputs of an Or gate 56.These pulses 6 correspond to lthe odd numbered pulses of curve E or thepulse of curve F in FIG. 2 delayed by the time between two pulses ofcurve 4 of FIG. 4 as will be noted by comparing the odd numbered baudsof curve E or the curve F of FIG. 2 with the second and successivesignals of curve 6 of FIG. 4.

The input wave 1 is also applied to an amplifier 58 and thence to a fullwaverectifier 60 which provides two full wave outputs such as wave 7 ofFIG. 4. One Wave 7 from the full wave rectifier 60 is applied to a peakdetector 62 and thence to -a `reference level circuit 64. The peakdetector 62 determines the level of the peaks of wave 7 as indicated bythe line8 of FIG. 4, and the reference level circuit 64 produces anoutput voltage shown in curve 9 which differs from the peak load 8 by anamount less than the voltage added to the peaks of wave 1 by amplitudemodulation thereof as described in connection with FIGS. 1 and 2. Thesignal condition of curve 9 is applied from the reference level circuit64 to a threshold circuit 66 to which wave 7 is also applied. Thresholdcircuit 66 passes only those parts of the wave 7 which exceed thereference level voltage 9 and provides square waves such as shown atcurve 10 of FIG. 4 for those portions of the wave 7 that exceed thereference level 9. The square waves shown in curve 10 contain theamplitude modulation components of the received wave 1, there being twopulses in curve 10 for each pulse of curve N of FIG. 2, due to t'hedoubling of peaks provided by the full wave rectifier 60.

The output wave 10 of the threshold circuit 66 and the timing pulsesshown in curve 5 at the 0 output termin-al of the timing extractor 44are applied to an And gate 68 whereby, whenever a negative-going pulseof curve 5 and a positive-going pulse of curve 10 coincide in time, apulse shown in curve 11 appears at the output of the And circuit 68whereby one of the double-d peaks is selected and appears at curve 11.Each pulse of curve 11 of FIG. 4 corresp-onds to the even numberedsignals of curve E of FIG. 2, but reversed in phase `and delayed twobauds of curve E and also of curve K of FIG. 2. The Or gate 56 merelycombines the pulses of wave 6 and the pulses of wave 11 to provide theoutput pulses shown in curve or wave 12 of FIG. 4, which is a reversephase replica of the pulses of curve E of FIG. 2, delayed however by twobauds of curve E.

Turning again to FIGS. 1 and 3, the pieces of equipment indicated by theseveral rectangles are conventional. The operation of the And and Orgates and the flip-flops has been described above. The data source 13 ofFIG. 1 may be any means to produce an analogue wave carrying informationto be transmitted and including a means for sampling both the positiveVand negative excursions of the wave by applying opposite phase inputwaves A and B thereto. Output pulses are provided only if the amplitudeof the analogue wave is greater than a predetermined amount when sampledand the output waves are always in one polarity. The timing extractor 44of FIG. 3 may include a phase locked oscillator, having a slightlylonger period of time than two bauds of curve E of FIG. 2, which issynchronized 'by applying the square pulses shown in curves 2 and 3 ofFIG. 4 thereto, the vertical edges of the pulse of curves 2 and 3 ofproper polarities acting as synchronizing pulses. The reference levelcircuit 64 can be, for example, a reversely lbiased diode, the reversebias being equal to the difference in level of curves 8 and 9 of FIG. 4.The threshold circuit 66 can be a reversely `biased diode to which thevoltage from reference level circuit 64 is applied as the reverse bias,the signal of curve 7 jbeing applied across this last mentioned reversedbias diode.

Although only a single AM/PM transmitter and receiver has beendescribed, it will undoubtedly be apparent to those lskilled in the artthat variations thereof 4are possible within the spirit of the presentinvention. Hence, it should 4be understood that the foregoingdescription is to be considered as illustrative land not in a limitingsense.

What is claimed is:

1. In combination:

means for phase modulating according to a rst signal a given wave bycausing the phase of said wave to be reversed in the middle of a cyclefor one signal condition and to Icontinue without phase reversal duringa cycle for a second signal condition, and

means for amplitude modulating according to a second signal the periodsof said phase modulated wave corresponding to the last half of a cycleand the first half of the next succeeding cycle of said phase modulatedwave.

2. In combination:

means for phase modulating according to a rst signal a given wave bycausing the phase of said wave to be reversed in the middle of a cyclefor one signal condition and to continue without phase reversal during acycle for a Second signal condition,

means for amplitude modulating according to a second signal said givenwave, and

means for combining said phase and amplitude modulated waves to form adoubly modulated wave in which the difference in phase of said phasemodulation and of said amplitude modulation of said given wave is an oddnumber of half cycles.

3. Apparatus for -phase modulating each cycle of a given wave inaccordance with a signal, said signal cornprising a pulse occurringduring certain cycles of said given wave indicating marks and theabsence of pulses occurring during others of said cycles indicatingspaces, and for amplitude modulating said wave without varying theaverage axis thereof due to said amplitude modulation comprising:

a first iiip-fiop circuit having a set and a reset input terminal and apair of output terminals, said output terminals exhibiting a firstopposite phase relation of output voltages upon application of a pulseto said set terminal and a reversed output phase relation of outputvoltages upon the application of a pulse to said reset terminal,

a source of timing signals having the frequency of said given waveconnected to said set input terminal to cause the output terminals ofsaid Hip-flop circuit to exhibit said first yopposite phase relation ofvoltage,

means for applying mark signals to said reset input terminal to causesaid flip-flop circuit to exhibit said reversed opposite phase relationof output voltages in response to the occurrence of a mark signal,

and And gate having two input terminals and an output terminal,

means for applying said timing signal to one input of said And gate,

means for applying an output appearing at an output terminal of saidtiip-op circuit to another input terminal of said And gate,

a second tiip-ilop circuit having input and output terminals, the phasevoltage appearing at the output terminals of said second iiip-op circuitreversing upon application of a pulse to the input terminals of saidsecond ip-op circuit,

means for applying the output of said And gate to an input terminal ofsaid second flip-flop circuit,

means for applying said given wave to an input terminal of said secondiiip-flop, whereby a phase modulated wave appears at an output terminalof said second iiip-tiop circuit in which the phase of the wave isreversed in the middle of a cycle in response to the occurrence of saidmark signal and in which the wave continues without phase reversal inresponse to the absence of said mark signal, and

means for amplitude modulating the periods of said phase modulated wavecorresponding to the last half of a cycle of said phase modulated waveand the first half of the next succeeding cycle of said phase modulatedwave in accordance with a second signal.

4. Apparatus for phase modulating each cycle of a given wave inaccordance with a signal, said signal comprising a pulse occurringduring certain cycles of said given wave indicating marks and theabsence of pulses occurring during others of said cycles indicatingspaces, and for amplitude modulating said wave without varying theaverage axis thereof due to said amplitude modulation comprising:

a first and a second flip-flop circuit each having a set and a resetterminal and a pair of output terminals, said output terminalsexhibiting a first opposite phase relation of output voltages uponapplication of a pulse to said set terminal and a reversed output phaserelation of output voltage upon the application of a pulse to its saidreset terminal,

a source of timing signals having the frequency of said given waveconnected to said set input terminal of said first flip-flop circuit tocause the output terminals of said first flip-flop circuit to exhibitsaid first opposite phase relation of voltages,

means for applying mark signals to said reset input terminal of saidfirst flip-op circuit to cause said rst hip-flop circuit to exhibit saidreversed opposite phase relation of output voltages in response to theoccurrence of a mark signal,

a plurality of And gates each having two input terminals and an outputterminal,

means for applying said timing signal to one input of each of said Andgates,

means for applying the two outputs appearing at said output terminal ofsaid first f1ip-op circuit respectively to the other input terminals ofsaid And gates,

means for applying the outputs of said And gates respectively to the setand reset terminals of said second fiip-fiop circuit, whereby anamplitude modulated wave appears at an output terminal of said secondflip-flop circuit in which the amplitude of the wave is at one level inresponse to the absence of a mark signal and at a different level inresponse to the occurrence of a mark signal,

means for phase modulating each cycle of said given wave, and

means for intermodulating said amplitude modulated wave and said phasemodulated wave to form a doubly modulated wave in which the differencein phase of said phase modulation and of said amplitude modulation ofsaid given wave is an odd number of half cycles.

5. Apparatus for phase modulating each cycle of a given wave inaccordance with a signal, said signal comprising a pulse occurringduring certain cycles of said given wave indicating marks and theabsence of pulses occurring during others of said cycles indicatingspaces, and for amplitude modulating said wave without varying theaverage axis thereof due to said amplitude modulation comprising:

means for separating said successive signals into two groups of signals,

' a first and a second fiip-op circuit each having a set and a resetterminal and a pair of output terminals, said output terminals of eachof said flip-flop circuits exhibiting a first opposite phase relation ofoutput voltages upon application of a pulse to said set terminal and areversed opposite phase relation of output voltages upon application ofa pulse to said reset terminal,

a source of timing signals providing one pulse for each cycle of saidgiven wave,

means for applying said timing signals to said set terlminal of saidfirst iiip-flop circuit to cause the output terminals of said firstfiip-op circuit to exhibit said first opposite phase relation ofvoltage,

means for applying mark signals of o-ne group of mark and space signalsto said reset input terminal of said first flip-flop circuit to causesaid first flip-flop circuit to exhibit said reversed opposite phaserelation of said output voltages in response to the occurrence of a marksignal,

a plurality of And gates each having two input terminals and an outputterminal,

means for applying said timing signals to one input of each of said Andgates, means for applying thetwo outputs appearing at said outputterminals of said first flip-flop circuit respectively to the otherinput terminals of said And gates,

means for applying the outputs of said And gates respectively to the setand reset terminals of said second fiip-flop circuit, whereby anamplitude modulated wave appears at an `output terminal of said lsecondflip-Hop circuit in which the amplitude of the modulated wave assumesone level in response to the occurrence of a mark in said first group ofmarks and spaces, and in which the wave assumes another level inresponse to the occurrence of a space in said first group,

means for phase modulating cycles of said given wave in response to theoccurrence of marks in said Second group of marks and spaces, and

means for intermodulating said amplitude and said phase modulated waveto form a doubly modulated wave in which the difference in phase of saidphase modulation and of said amplitude modulation of said given wave isan odd number of half cycles.

6. Apparatus for phase modulating each cycle of a given wave inaccordance with a signal, said signal comprising apulse during certaincycles of said given wave indicating marks and the absence of pulsesoccurring during others of said cycles indicating spaces, and foramplitude modulating said Wave without varying the average axis thereofdue to said amplitude modulation cornprising:

Vmeans for providing a succession of mark and space signals at a rateequal to twice the frequency of said given wave,

means for separating said successive signals into two groups of signals,

a fiip-op circuit having a set and a reset terminal and a pair of outputterminals, said output terminals exhibiting a first opposite phaserelation of output voltages upon application of a pulse to said setterminal and a reversed opposite phase relation of output voltages uponapplication of a pulse to said reset terminal,

a source of timing signals providing one pulse for each cycle of saidgiven wave,

means for applying said timing signals to said set terminal of saidflip-Hop circuit to cause the output terminals of said flip-fiop circuitto exhibit said first opposite phase relation of voltages,

mean for applying said mark signals of one group of mark and spacesignals to said reset input terminals of said flip-flop circuit to causesaid flip-flop circuit to exhibit said reversed opposite phase relationof said output voltages in response to the occurrence of a mark signal,

an And gate having two input terminals and an output terminal,

means for applying said timing signals to one input of said And gate,

means for applying an output appearing at an output terminal of saidflip-flop circuit to the other input terminal of said And gate,

a second flip-flop circuit having input and output terminals, the phaseof voltages appearing on said output terminal reversing upon applicationof a pulse to an input terminal thereof,

a means for applying the output of said And gate to an input terminal ofsaid second flip-flop circuit, means for applying said given wave to aninput terminal of said second flip-flop circuit, whereby a phasemodulating wave appears at an output terminal of said second Hip-flopcircuit in which the phase of the phase modulated wave is reversed inthe middle of a cycle thereof in response to the occurrence of a mark insaid first group of marks and spaces, and in which the wave continueswithout phase reversal in response to the occurrence of a space in saidfirst group, and

means for amplitude modulating the periods of said phase modulated wavecorresponding to the last half of a cycle and the first half of the nextsucceeding cycle of said phase modulated wave according to said secondgroup of marks and spaces.

7. Apparatus for phase modulating each cycle of a given wave inaccordance with a signal, said signal comprising a pulse occurringduring certain cycles of said given wave indicating marks and theabsence yof pulses occurring during others of said cycles indicatingspaces, and for amplitude modulating said `wave without varying theaverage axis thereof due to said amplitude modulation comprising:

means for providing a succession of mark and space signals at a rateequal to twice the frequency of said given wave,

lmeans for separating said successive signals into two groups ofsignals,

a first, a second and a third flip-Hop circuit each having a set andreset terminal and a pair of output terminals, said output terminals ofeach of said flip-flop circuits exhibiting a first opposite phaserelation of output volt-ages upon application of a pulse to said setterminal and a reversed opposite phase relation of output voltages uponapplication of a pulse to said reset terminal,

a source of timing signals providing one pulse for each cycle of s-aidgiven wave,

means for connecting said source of timing signals to said set inputterminal of said first flip-flop circuit to cause the output terminalsof said first flip-flop circuit to exhibit said first opposite phaserelation of voltages,

means for lapplying mark signals of one of said groups -thereof to saidreset input terminal of said first ip-flop circuit to cause said iirstflip-flop circuit to exhibit said reversed output phase relations ofsaid output voltages in response to the occurrence of a mark signal,

three And gates each having two input terminals and an output terminal,

means for applying said timing signals to one input of each of said Andgates,

means for applying the two outputs appearing at said output terminals ofsaid first Hip-flop circuit respectively to the other input terminals of-two of said And gates,

means for applying the outputs of said two And gates respectively to theset and reset terminals of said second fiip-fiop circuit, whereby anamplitude modulated wave appears at an output terminal of said secondiiip-iiop circuit in which the amplitude modulated wave assumes one-amplitude in response to the occurrence of a mark in said first groupAof marks and spaces and in which the amplitude modulated wave assumesanother amplitude in response to the occurrence of a space in said firstgroup,

a modulator having two input terminals and an output terminal,

means for lapplying said amplitude modulated wave to one input terminalof said modulator,

means for applying said timing pulses to said set input terminal of saidthird fiip-fiop circuit,

means to apply said second group of signals t said reset terminal ofsaid third flip-flop circuit,

means for applying one of the outputs of said third flip-dop circuit tothe second input of said third And gate circuit,

a fourth flip-flop circuit having input and output terminals, theapplication of a voltage to an input terminal reversing the phase of thevoltage at the output terminals thereof,

means for applying the output of said third And gate to an input of saidfourth Hip-flop circuit,

means for applying said given wave to the other input of said fourthflip-flop circuit, whereby a phase modulated Iwave appears at the outputof said fourth flip-op circuit in which the phase of said given wave isreversed at the middle of a cycle in response to a mark in said secondgroup of marks and spaces and in which said given wave continues withoutchange in phase in response to a space of said second group of lmarksand spaces, and

means to apply the output of said fourth flip-fiop circuit to the otherinput of said modulator whereby a phase and an amplitude modulated wavesappears at the output of said modulator.

8. Apparatus for phase modulating each cycle of a `given wave inaccordance with a signal, said signal cornprising a pulse occuringduring certain cycles of said given wave indicating marks and theabsence of pulses occurring during -others of said cycles indicatingspaces, and for amplitude modulating said wave without varying theaverage axis thereof due to said amplitude modulation comprising:

means for providing a succession of mark and space signals at a rateequal to twice the frequency of said given Wave,

means for separating said successive signals into two groups of signalscomprising a first pair of And gates each having a pair of inputterminals and an output terminal,

means for applying said signals to one input terminal of each And gate,

means for .applying said given wave as a first phase to the second inputterminal of one And gate and at a reversed phase to the other inputterminal of said second And gate circuit, a group of signals appearingat the output of each of said first pair of And gates,

a first, a second and a third flip-flop circuit each having `a set and areset terminal and a pair of output terminals, said output terminals ofeach of said fiip-flop circuits exhibiting a first opposite phaserelation of output voltages upon application of a pulse to said setterminal and a reversed opposite phase relation of output voltages uponapplication of a pulse to said reset 4terminal,

a source of timing signals having the frequency of said given waveconnected to said set input terminal of said first fiip-op circuit tocause the output terminals of said first Hip-flop circuit to exhibitsaid first opposite phase relation of voltages,

means for applying said mark signals of one group thereof at the outputof one of said first pair of And gates to said reset input terminal ofsaid first Hip-flop circuit to cause said first fiip-liop circuit toexhibit said reversed output phase relations of said output voltages inresponse to the occurrence of a mark signal,

a second plurality of And gates each having two input terminals and anoutput termin-al,

means for applying said timing signals to one input of each of saidsecond plurality of And gates,

means for applying the two outputs appearing at said output termin-alsof said first flip-flop circuit respectively to the other inputterminals of two of said second plurality of And gates,

means for applying the outputs of said last-mentioned two And gatesrespectively to the set and reset terminals of said second fiip-iiopcircuit, whereby an amplitude modulated wave appears at an outputterminal of said second iiip-flop circuit in whichthe amplitude of theamplitude modulated wave assumes one amplitude in response to theoccurrence of a mark in said first group of marks and spaces and inwhich the wave assumes another amplitude in response to the occurrenceof a space in said first group,

a modulator having two input terminals and an output terminal,

means for applying said amplitude modulated Wave to one input terminalof said modulator,

means for applying said timing signals to the said set input terminal ofsaid third flip-flop circuit,

means for -applying said second group of marks and spaces at the outputof the other of said first pair of And gates to the reset terminal ofsaid third flip-Hop circuit,

means for applying one of the outputs of said third fiip-fiop circuit tothe second input of a third And gate circuit of said second pluralitythereof,

a fourth ip-tiop circuit having input and output terminals, theapplication of a voltage to an input terminal reversing the phase of thevoltage :at the output thereof,

means for applying the output of said third And gate to one input ofsaid fourth ip-flop circuit,

means for applying said given wave to an input of said fourth flip-liopcircuit, whereby a phase modulated Wave appears at the output of saidfourth flip-flop circuit in which the phase of the wave reverses in themiddle of the cycle in response to a mark in said second group of marksand spaces and in which the wave continues without change of phase inresponse to a space of said second group of marks and spaces, and

means to apply the output of said fourth fiip-flop circuit to the otherinput of said modulator whereby a phase and an amplitude modulated waveappears at lthe output of said modulator.

9. A system for producing doubly modulated waves comprising:

a generator for producing waves at a reference frequency: a

a source ofY analogue information,

means responsiveto reference waves f-rom said generatorto produce asuccession of mark and space signals from said analogue wave, said marksignals comprising pulses produced responsive to said analogue waveattaining a predetermined amplitude in either direction from zerodu-ring the interval of a cycle of said reference wave and said spacesignals comprising the absence of pulses during the interval of anothercycle of said reference wave during which said analogue signal does notattain said predetermined amplitude,

landi a reset terminal and a 4pair of output terminals,

said output terminals exhibiting airst 'opplosite phase relation ofoutput voltages upon `lapplication l ola pulse to `said set terminal andareversed op i "'posite phase relationof output voltages uponapplication'of-a pulse to'fsaid reset terminal, Y` a sourcel of givenwaves at '-half the frequency" of said referencewaves, 1 Ia'source oftiming signals providing one pulse for each cycle of said given waves,`means-for applying said'timing signals to said setterminal of saidfirst-flipeop 'circuit tofcause-'the out- 'lput terminals'of said firstiiip-op circuit to exhibit said first opposite phase relation Iof?voltage, "mea'ns for'applying said mark-signals of one group of mark andspace signals to said reset input terminal of said first flip-flopcircuit to cause said-'first flip-flop circuit vto exhibit said reversedopposite phase rela- Eltiondcf said output voltages in response to the'occurf" rence of a mark signal,l

a plurality of And gates each having two input terminalsvand an outputterminal, means for applying said timing Signals to one input of each ofsaid And gates, means k'for applying the two outputs appearing at saidoutput terminals of said'first flip-flop circuit respectively to thevother input terminals/"of said And gates, a means for'applying the4outputs of Asaid And gates re-V spectively tothe two inputs'of saidsecond flip-flop "circuit/whereby an amplitude modulated wave appearslat an outputterminal of said second'fiip-op :ci-rcuit, in which theamplitudeof the'amplitude Imodluated wave assunies'oney level inlresponse 'to the occurrence of a mark-in said first group Vof marks andspaces, and in which the wave'assumes another level in response to theoccurrence of a space in said first'group,andv

Imeans for phase modulating Ithe cycles ofy said amplitude modulatedfwave accordingto -theoccurrence of'a-"mark insaid second group ofmarksand spaces. I 10. -Ina system for producing' doubly modulated waves agenerator for producingfl'waves at'a reference fre- 'a source ofanalogue information', A

l' means for'sep'arating said'successivesignals'into two Egroups ofsignals, ,a

,Qa tirstAiip-op circuit 'havinga set fand areset terminal and a pairofoutput terminals, said-output terminals my, exhibitinga first oppositephase-relation .of `output ,voltagesupon iapplicationpf a pulseto saidset terminal land a1reversed, opposite phaserelation of out-`:,.putvoltages'upon application lot a pulse-to said reset i athalf'theffrequency of said reference waves,

j -a Asourcelof.timingsignalsprovidingone pulse'for each .cycleof saidgiven waves,v

-means for applying said-timing signals to said set terminal-of saidfiip-liop circuit to cause the output terminals of saidfiip-fiop-circuit toexhibit said first 'oppositephase relation ofvoltages,

means for applyingl saidlmark signals y"of one of said i groups ofmarkand space signals to said-reset input terminal of said flip-flopcircuit to cause said fiip-fiop circuit to exhibit said reversedopposite phase relation of said outputvoltages in'respons'eto theoccurrenc`e of amark signal, Y an-And gate having" two inputterminalsand an output terminal,v i Umeans for applying saidtimingsignals to one input of said And gate, meansfor applying the outputvappearing at one output terminal of said fiip-iiopl circuit to theotherinput terminal of said And gate,

a second flip-flop circuit exhibiting'reversed phase of outputresponsive to application of a pulse to an input thereof,

means for applying the output of saidAnd gate to an input of said secondfiip-flop circuit,

"means to apply said given wave to an input" of said second fiip-flopcircuit whereby a phase modulated wave appears at an output terminal ofsaid second fiip-flop circuit in which the phase of the phase modulatedwave is reversed in the middle of a cycle thereof in response to theoccurrence of a mark in said one group of marks and spaces, and in whichthe wave continues without phase reversal in response to the occurrenceof a space in said one group, and

means for amplitude modulating the periods of said phase modulated wavecorresponding to the last half of a cycle of said phase modulated waveand the first half of the next succeeding cycle o f said phase modulatedwave in response to the occurrence of a mark in said second group ofmarks and spaces.

11. Means for demodulating a Wave theI successive cycles of which arephase modulated in accordance with marks and spaces and in which periodscorresponding to the last half of a cycle and the first half ofthe nextsucceeding cycle are amplitude modulated in accordance with other marksand spaces comprising:

means responsive to said wave to be demodulated for providing twoAout-of-phase square waves,

a timing extractor having two input terminals and two output terminals,

means to apply said square waves to the respective input terminals ofsaid timing extractor for producing alternately appearing timing pulsesat the two output terminals thereof,

1a pair of And gates each having three input terminals,

means for applying the timing pulses appearing at one 'l of said outputterminals to respective first input terminals of said And gates,

means for applying said square waves respectively to second inputterminals of said And gates,

an Or gate having two input terminals and one output terminal,

' means for applying the outputs of said And gates respectively to thetwo inputs of said Or gate,

a fiip-fiop circuit having one input terminal and two output terminals,the voltage appearing at said output terminals always being out-of-phaseand the phase relationship therebetween reversing in response to a pulseapplied to the input terminal of said flip-flop circuit,

. means including a delay device for applying the output of said Or gateto the input terminal of said flip-flop circuit, Y

respective connections between the output terminals of said flip-flopcircuit and the third input terminals of said And gates, whereby thephase modulation information included in said wave to be demodulatedappears at the output of said Or gate, t

means for full wave rectifying said wave to be demodulated,

Mrneansorv passing-thepeaks of said full rectified wave Y above apredetermined `reference level,

an And gate having two input terminals and an output terminal, and t vmeans for applying the passedpeaks and the timing cpulsesappearing atthe second output terminal ofsaid t timing. extractor respectively tothe input terminals of saidilast named And gate, whereby the amplitudemodulation information'includedin said wave to be Y demodulatedappears-at Athe output of isaidlast named 16 to apulse appliedV to-theinput-'terminal '-o--saidpop circuit,

means including a delay of said Or gate to iiop circuit,

respective conneetions'betwe'en the :out t'itterminals of said flip'opcircuita thethirfd ftermiiials'f said And gates, whereby; tties'ignals'hcar'ied'by said wave to be' demodlatedasphiase modulationappears at the output of said Or gate,

device for applying the output the input terminal of said iiip- Andgate.Y w means for full wave reetifying said wave to be demod- 12. Meansfordemodulating a wave'the successive cy- Ulael- ,t ,i t cles ofzwhichare phase modulated :in accordance with means for passing the Peaks OfSifi fn11 eCiiiedWaV both mark andspace signals-comprising: t abovealpredeter'mined ref ere'r1 l\ means-responsive-to said wave to bedemodulated for 15 an Anfi gaie hailing' YO intim ilfininii iiprovidingtwo 1.80" outof phase square waves, terminal, ,f` l .i i. l,la timing extractor having two input terminals :and two 'means fOrapplying-'ihn Passed' P QaiS'S, and' th ,iim fg output terminals, pulsesappearing aitft'he' second 'outp'ut'ftermmn ,l meansftoapply saidsquare.waves to the respective Said timing eXfCQI feSP'CfiViY In nin2nt`f i eiff input terminals of said timing extractor. for, produc-*minals of said 'last named -gate,'vfwherebyftlre l. .,tjngalternatelyappearing timing pulses at the two signals carried by'said wave tobeA'Hde'rnodulat'ed output terminals thereof, l amplitudemodulati'onappear attire outp'utj of a pair of And gateseach having three inputterminals, 13st named And gate,- 'I L means for applying the timingpulses appearing at one 'means 'fnl' 'Combiningiisnid :Phase andSaidamplitude of said output terminals to respective first inputtermodulated Signals lncinding an Of 'gaie having WO minals of saidAndgates, inputs and One; Output, and f means for applying said squarewaves respectively to means for applying Said Phas mnnniatinn Signal andsecond input terminals of said And gates, saidv amplitude modulation'signal tothe respective .an Orv gate having two input terminals and oneoutput iIlpUS 0f Said lastnamed Or'gate.. f

terminal, 14. Apparatus for phase modulating each cycle of a given wavein accordance With a signal said signal c Omprising a pulse occurringduringfcertain `cycles of said given wavel indicating marks and theabsence of pulses 'occurring during others of said cyclesindicatingspaces, Vfor amplitude modulating saidwave withoutvarying the averageaxis thereof dueto said amplitude modulation tij-'produce 'a doublymodulated-wave,'`and"for dern'odla'ting vdsaid doublyrmodulated wave, lsaid modulatorfcomprising: j v f' a rstf-flip-op circuit htivingia setand faresetterminaland a pairiof outputterminalsfsaikout# A,putterminalsf exhibitingv a tir'sf'opposite'phasfe means for applying theoutputs of said And gates respectively to the two inputs of saidOrlgate, a nip-flop circuit having onelnput terminal and two outputterminals, the voltage appearing at said output terminals always beingout of phase and the phase relationship therebetween reversing inresponse to a pulse applied to the input terminal of said Hip-Hopcircuit, means including a delay device for applying the output of saidOr gate to the input terminal of said iiip- ,ilop circuit, v respectiveconnections `between the output `terminals I 0f said iiiP-op circuit andthe third input terminal felation '0f 'UPUtVOlageSnPOn 'lfpilnflnnniofof Said And gates whereby the'phase modulation 1-'1' -1.-a pulsetoasaidsetrterminalandareversedoit signals applied to said wave to bedemodulated ap `-'"Pnt-Pi'1a8velatl0l` 0f outpnfVeitage'nlfnih:a pearsat the Outp'ut of Said or gata 4 plicatron o f apulse tozsald-'resetterm'1n`al,l- Y 13. Means for demodulating a wave the successivecya'TSOUfCe Onming Signis 0f the`fflu'encyt0fiaii cles of which arephase modulated in accordance with g1VeIl Wave Connected. to Said Setinput tfminai mark and space signals and in which the periods corre- 0fSaid lP-fip Circult t0 .Causefthelupnfef' sponding to the last half of acycle and the first half of mlnais 0f y'Sal'iilP-np Cn'nl i0y exhibit;Said the next succeeding cycle are amplitude modulated in acrst opposlte,phase relailomof'woltflges ff." cordance with other mark and spacesignals comprising: means for applymmak'slgnais to, sad restlp' meansresponsive to said wave to be demodulated for Pt termufal f saldlP'OPFrcult to causfbiid providing two 180 out-of-phase square waves, Y=iilPQP Clffult in @Xhlbltsald fevswed Opposite a timing extractorhaving two input terminals and two 1" 'Phase fe'latlon Ofioutput'Vfltages I Wfesponsefo Output terminals, the'goccurrenceoa marksignalg:means to apply said square waves to the respective inirslAtn gatihiaymgiwof mpi an put terminals of said timing extractor for producing i'iflOl-mllnniisa/i umm :qiiilift-ongztni nt alternately appearing timingpulses at the two outr of Sinpgt J ,r Put terminals thereof, 60 V i l i"if i vmeans. for.applymgrthecutputappearing:at an a P2ur 0f gates eachhavlng three Input tefmmals ai outputeterminal, off said ip-.optcircuitothe means f'orapplying the timing pulsesappearing at one ji..btherinputlterminai EOrsaici And gate; l

Of'riligoutiitlgeimmtals to respective rst mlmt fi a-second flip-flopcircuit having inputtz-and outPu m1 Sal n ga es f ---terminals .thevoltage fof:-saidfleutput'lterminals 60 t mrfriyfmisSdW mvely m "f S-d-Sewnfip'iwfeviismg"miPhagiiio a -u :app' rcation' o fapu` sefto anipirttemina antgr gale. having two lnput termmals and one output Y-meanezfoy pplyingvitheIbitpntf said AndE gate mm t 1- to an'i'xiputterninafefsaid t i means for applying the outputs of said And gates re-70 f1 ff spectively to the two inputs of said Or gate,

a flip-flop circuit having one input terminal and two output terminals,the voltage appearing at said output terminals always beingout-of-phase, and the phase relationship therebetween reversing inresponse t P Girault fiere: 4'byaplia'se modulated wave a pears at'anfoutput tlerfrniiialpfsaid ys ectrn nip p circuitin w 1 h 17 18 dle ofa cycle in response to the occurrence f the third input terminals ofsaid pair of And a mark and in which the wave continues withgates,whereby said mark and space signals apout phase reversal in response tothe occurrence plied to said wave to be demodulated as phase of a space,modulation appear at the output of said Or gate, means for amplitudemodulating the periods of said means for full wave rectifying saiddoubly moduphase modulated wave corresponding to the last half latedwave to be demodulated, of a cycle and the first half of the nextsucceeding means for passing the peaks of said full rectified cycle ofsaid phase modulated wave according to wave above a predeterminedreference level, the mark and spaces of a second signal to produce afurther And gate having two input terminals and said doubly modulatedwave, an output terminal, said demodulator comprising: means forapplying the passed peaks and the timmeans responsive to said doublymodulated wave ing pulses appearing at the second output of forproviding two 180 out of phase square said timing extractor respectivelyto the input waves, terminals of said further And gate, whereby said atiming extractor having two input terminals and mark and space signalsapplied to said wave to two output terminals, be demodulated asamplitude modulation apmeans to apply said square waves to therespective pear at the output of said further And gate,

input terminals of said timing extractor for prO- means for combiningsaid phase and said amplitude ducing alternately appearing timing pulsesat the modulation signals including a further Or gate havtwo outputterminals thereof, ing two inputs and one output, and a pair of Andgates each having three input tel'- means for applying said phasemodulation signals and minals, said amplitude modulation signals to therespective means for applying the timing pulses appearing inputs of saidfurther Or gate.

at one of said output terminals to respective iirSt 15. A modulator forphase and amplitude modulating input terminals of said pair of Andgates, a carrier wave comprising: means for applying said square wavesrespectively means for phase modulating a cycle of said wave by tosecond input terminals of said pair of And reversing the phase ofone-half cycle of said wave gates, for one signal condition and forcontinuing the wave an Or gate having two input terminals and onewithout phase reversal during a cycle for a second output terminal, 3()signal condition, and means for applying the outputs of said pair Ofmeans for amplitude modulating said phase modulated And gatesrespectively to the two inputs of said wave in accordance with a secondsignal while main- Or gate, taining a substantially zero average directcurrent a tiip-ilop circuit having an input terminal and level of saidwave.

two output terminals, the voltages appearing at said output terminalsalways being out of phase, References Cited and the phase relationshiptherebetween revers- UNITED STATES PATENTS ng .n respon-se t a pnl.a-pphed to a Input 2,611,826 9/1952 Kaifaian 332-17 X ermmal of saidflip op circuit, means including a delay device for applying the 4()2987683 6/1961 Power? 332-41 X output of said Or gate to the inputterminal of 311601812 12/1964 Scantlm 325-139 X said last-namedflip-flop circuit, respective connections between the output termi-ROBERT L' GRIFFIN prima@ Exammer' nals of said last-mentioned flip-flopcircuit and I. T. STRATMAN, Assistant Examiner.

